Citation: Bei Jiang, Jingyu Sun, Zhongfan Liu. Synthesis of Graphene Wafers: from Lab to Fab[J]. Acta Physico-Chimica Sinica, ;2022, 38(2): 200706. doi: 10.3866/PKU.WHXB202007068 shu

Synthesis of Graphene Wafers: from Lab to Fab

  • Corresponding author: Jingyu Sun, sunjy86@suda.edu.cn Zhongfan Liu, zfliu@pku.edu.cn
  • Received Date: 25 July 2020
    Revised Date: 18 August 2020
    Accepted Date: 19 August 2020
    Available Online: 21 August 2020

    Fund Project: the National Basic Research Program of China 2016YFA0200103the National Natural Science Foundation of China 61527814the National Natural Science Foundation of China 51702225the Beijing National Laboratory for Molecular Sciences BNLMS-CXTD-202001the Beijing Municipal Science and Technology Planning Project Z191100000819004

  • Graphene wafers have emerged in response to the increasing demand of wafer-scale two-dimensional materials and high-performance on-chip devices in the field of integrated circuits, microelectromechanical systems, and sensors. Wafer-scale graphene films display great application potential, owing to their atomic layer thickness, excellent thermal and electrical conductivity, and compatibility with wafer-processing technology. Therefore, batch production of graphene wafers is exceedingly crucial. The chemical vapor deposition (CVD) method has attracted attention for the production of high-quality graphene wafers with high controllability, high compatibility, and low cost. Mature CVD manufacturing has been widely employed in the semiconductor industry to date, aiding in the industrialization of CVD graphene wafers and creating opportunities for graphene to enter the new era of nanoelectronics. The quality of graphene wafers has a significant impact on the subsequent device fabrication; hence, considerable efforts have been made to date to realize precise control over domain size, structural defects, and layer thickness during synthesis. In this study, we summarize the recent progress made in wafer-scale CVD graphene synthesis. Initially, we introduce the quality requirements of graphene wafers targeting various application scenarios, and propose the classification of graphene wafers. Single crystallinity is considered to be a key requirement for the graphene used in high-performance electronics and optoelectronics. We then review the recent CVD-derived graphene wafers with regard to substrate types (metal/nonmetal), highlighting the constrictions in graphene quality and corresponding synthetic solutions. Batch synthesis of graphene wafers is further discussed. The significant role of flow dynamics in the up-scaling process is emphasized, followed by relevant experimental instances based on computational fluid dynamics simulations. Finally, strategies for obtaining graphene wafers are overviewed, with the proposal of future perspectives. This study focuses on three areas: (1) Application requirements for the quality of graphene wafers, including target substrate types and as-grown graphene features (chemical stability and electrical and thermal properties), (2) CVD strategies of graphene wafers: As for the growth scenarios on metal substrates, controllable preparation of bilayer/multilayer graphene and the elimination of structural defects remain challenging. With respect to the synthesis over nonmetal wafers, concrete examples highlighting the epitaxial growth on a crystalline substrate and tailorable growth on a surface-reconstructed substrate are summarized. (3) Batch synthesis of graphene wafers: CVD routes for scalable production are explored.
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